Add experimental half precison support

With this MR experimental half-precision support is added

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requested review from @kohl

assigned to @holzer

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• 6c583c13 - Small correction

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• edd4fe27 - Add half precision support for CPU

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• 6b8859d3 - Corrected is_half checker

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• 5a5f13dc - Correct header detection

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• 6ceafb9c - test number type

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• 5ef0dd37 - remove typed numbers etc

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approved this merge request

Any plans to support CPU vectorization? Half precision is supported by Sapphire Rapids' AVX512 implementation (_m512h types), ARM Neon (float16x4_t), and ARM SVE (svfloat16_t), while the RISC-V "Zvfh" extension (vfloat16m1_t) is currently in the process of being ratified.

requested review from @kuron and removed review request for @kohl

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• e57837b1 - Pythonise half precison header

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• 287a4c79 - Rename cudajit to gpujit

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• 533afcdf - Add more warnings and tests

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