From 632db8d8f55d888f0e191b544aa0e0cac822effb Mon Sep 17 00:00:00 2001
From: Michael Kuron <mkuron@icp.uni-stuttgart.de>
Date: Thu, 27 May 2021 15:20:55 +0000
Subject: [PATCH] Workaround for __BIGGEST_ALIGNMENT__ on Clang
On x86_64, this is always 128 bits, rendering it incompatible with AVX.
GCC reports the maximum enabled vector width (which is what we want) and Intel reports the maximum supported vector width (which is okay too).
---
src/field/Field.impl.h | 4 ++--
1 file changed, 2 insertions(+), 2 deletions(-)
diff --git a/src/field/Field.impl.h b/src/field/Field.impl.h
index 53e689c11..20ee14bb9 100644
--- a/src/field/Field.impl.h
+++ b/src/field/Field.impl.h
@@ -322,14 +322,14 @@ namespace field {
const uint_t alignment = 64;
#elif defined(__ARM_NEON)
const uint_t alignment = 16;
-#elif defined(__BIGGEST_ALIGNMENT__)
- const uint_t alignment = __BIGGEST_ALIGNMENT__;
#elif defined(__AVX512F__)
const uint_t alignment = 64;
#elif defined(__AVX__)
const uint_t alignment = 32;
#elif defined(__SSE__) || defined(_MSC_VER)
const uint_t alignment = 16;
+#elif defined(__BIGGEST_ALIGNMENT__)
+ const uint_t alignment = __BIGGEST_ALIGNMENT__;
#else
const uint_t alignment = 64;
#endif
--
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